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CY28551-3
......................Document #: 001-05677 Rev. *D Page 3 of 28
31
**DOC2
I, PD
Dynamic Over Clocking pin
0 = normal, 1 = Frequency will be changed depend on DOC register. Internal 150k
pull-down.
32
VSSCPU
GND
Ground for outputs.
33
CPUC1
O, DIF Complement Differential CPU clock output.
Intel type SR output buffer.
34
CPUT1
O, DIF True Differential CPU clock output.
Intel type SR output buffer.
35
VDDCPU
PWR
3.3V power supply for outputs.
36
CPUC0
O, DIF Complement Differential CPU clock output.
Intel type SR output buffer.
37
CPUT0
O, DIF True Differential CPU clock output.
Intel type SR output buffer.
38
VTT_PWRGD#/PD
I
3.3V LVTTL input. This pin is a level-sensitive strobe used to latch the HW strapping
pin inputs. After asserting VTT_PWRGD# (active LOW), this pin becomes a
real-time input for asserting power-down (active HIGH)
39
SDATA
I/O
SMBus compatible SDATA
40
SCLK
I
SMBus compatible SCLOCK.
41
VDDREF
PWR
3.3V power supply for outputs.
42
XOUT
O
14.318-MHz Crystal Output
43
XIN
I
14.318-MHz Crystal Input
44
VSSREF
GND
Ground for outputs.
45
**MODE/REF2
I/O, SE,
PD
3.3V-tolerant input for selecting output/14.318-MHz REF clock output. Internal 150k
pull-down
0 = Desktop, 1 = Notebook
Intel Type-5 output buffer
46
**FSC/REF1
I/O,PD,
SE
3.3V-tolerant input for CPU frequency selection/14.318-MHz REF clock output.
Internal 150k pull-down
Intel Type-5 output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
47
**FSD/REF0
I/O,PD,
SE
3.3V-tolerant input for CPU frequency selection/14.318-MHz REF clock output.
Internal 150k pull-down
Intel Type-5 output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
48
RESET_I#/SRESE
T#
I/O, OD 3.3V-tolerant input for reset all of registers to default setting.
3.3V LVTTL output for watchdog reset signal
49
**DOC1
I, PD
Dynamic Over Clocking pin
0 = normal, 1 = Frequency will be changed depend on DOC register. Internal 150k
pull-down
50
**CLKREQ#B/PCI0 I/O,SE,
PD
3.3V tolerant LVTTL input for Output enable of PCIEX 4,5 via register
selection/33-MHz clock output. Internal 150k pull-down
Intel Type-3A output buffer
51
**CLKREQ#A/PCI1 I/O,SE,
PD
3.3V-tolerant LVTTL input for Output enable of PCIEX 6,7 via register
selection/33-MHz clock output. Internal 150K pull-down
Intel Type-3A output buffer
52
VSSPCI
GND
Ground for outputs.
53
**FSA/PCI2
I/O, PD 3.3V-tolerant input for CPU frequency selection/33-MHz clock output. Internal 150k
pull-down
Intel Type-3A output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications
Pin Description (continued)
Pin No.
Name
Type
Description
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